But How Do We Really Debug Transactional Memory Programs?

With recent announcements of hardware transactional memory (HTM) systems from IBM and Intel, HTM will soon be available for widescale adoption. Such platforms, combined with tested and stable software transactional memory systems, are likely to make real transactional memory (TM) systems available for the first time, which promises to be a more attractive alternative than lock-based parallel programming in terms of programmability and performance. With these first-ever real systems come several open questions. Perhaps one of the most obvious is, “how does one debug a TM program that uses real hardware?” While prior research in this area exists, there are, to the best of our knowledge, no commercially-available TM debuggers and only a handful of research projects exploring such possibilities, many of which use simulated HTMs that may utilize unrealistic hardware. In this paper, we motivate the need for more than traditional and ad hoc debugging support. We then propose a novel record-and-replay system, based on existing research prototypes and demonstrate its usefulness by reviewing several use cases in TM programming, restricting use to real features in IBM and Intel’s HTMs.